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Forum Index : Microcontroller and PC projects : Y'all ready for this?

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PhenixRising
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Joined: 07/11/2023
Location: United Kingdom
Posts: 1937
Posted: 10:06am 22 May 2026
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Betas for Pico, Pico 2 and Micro:bit

I have the RP2350 uf2 running on Pete's DIL module.

NOTE: This is the very first release for Pico so don't expect accurate documentation. One minute you think you're reading about the Pico but you ain't  
 
mozzie
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Joined: 15/06/2020
Location: Australia
Posts: 370
Posted: 08:04am 23 May 2026
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G'day Phenix,
Thanks for the link, only had a quick look but for simple stuff and speed this looks very good.

Also has the one thing the PicoMite lacks, a proper low power sleep mode. Assuming it works of course.

More research required.

Regards, Lyle.
 
Mixtel90

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Joined: 05/10/2019
Location: United Kingdom
Posts: 8877
Posted: 09:49am 23 May 2026
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TBH I'm not sure what I'm looking at...  :)

The various low power modes on the RPnnnn drive me bog-eyed when I look at the data sheet!

I have a MicroBit somewhere. It's programmed as a thermometer, but I'm not sure where it is.
Mick

Zilog Inside! nascom.info for Nascom & Gemini
Preliminary MMBasic docs & my PCB designs
 
PhenixRising
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Joined: 07/11/2023
Location: United Kingdom
Posts: 1937
Posted: 10:04am 23 May 2026
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Hi Lyle,

Yes the SLEEP is what caught my eye because others have mentioned it.

It's so nice to settle on the RP2350 DIL module, running MMBasic and having another, running ARMbasic as a super high-speed peripheral.

I'm currently testing and not surprisingly, it's FAST
 
PhenixRising
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Joined: 07/11/2023
Location: United Kingdom
Posts: 1937
Posted: 11:55am 23 May 2026
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  Quote  
Note:
1) Not overclocked
2) Times are for all 1000 iterations

BM1:
2040: 0.383 msec
2350: 0.277 msec

BM2:
2040: 0.332 msec
2350: 0.230 msec

BM3:
2040: 0.859 msec
2350: 0.523 msec

BM4:
2040: 1.283 msec
2350: 0.402 msec

BM5:
2040: 1.362 msec
2350: 0.486 msec

BM6:
2040: 3.111 msec
2350: 1.584 msec

BM7:
2040: 3.721 msec
2350: 1.957 msec

BM8:
2040: 564.388 msec
2350: 95.297 msec

#define include_trig
#include <AB_Math.bas>


sub printTime (usec)
   dim flt_usec as single
   
   if usec <1000 then
       Print "0.";(usec);" msec"
   Else    
       flt_usec = usec / 1000
       print flt_usec;" msec"
   endif
   print
endsub


Main:
Print "ARMbasic Benchmark tests"
Print " "

Print "Benchmark 1"
A=Timer
For j = 1 To 1000
Next j
printTime(Timer-A)

Print "Benchmark 2"
A=Timer
j =j0
BM2:
j = j+1
If j < 1000 then GoTo BM2
printTime(Timer-A)

Print "Benchmark 3"
A=Timer
j = 0
BM3:
j = j+1
aa = j/j*j+j-j
If j < 1000 then GoTo BM3
printTime(Timer-A)

Print "Benchmark 4"
A=Timer
j = 0
BM4:
j = j+1
aa = j/2*3+4-5
If j < 1000 then GoTo BM4
printTime(Timer-A)

Print "Benchmark 5"
A=Timer
j = 0
BM5:
j = j+1
m = j/2*3+4-5
Gosub fourthou
If j < 1000 then GoTo BM5
printTime(Timer-A)

Print "Benchmark 6"
A=Timer
j = 0
dim ray(5)
BM6:
j = j+1
m = j/2*3+4-5
Gosub fourthou
For q = 1 TO 5
Next q
If j < 1000 then GoTo BM6
printTime(Timer-A)

Print "Benchmark 7"
A=Timer
j = 0
dim ray2(5)
BM7:
j = j+1
m = j/2*3+4-5
Gosub fourthou
For q = 1 TO 5
ray2(q) = m
Next q
If j < 1000 then GoTo BM7
printTime(Timer-A)

Print "Benchmark 8"
A=Timer
j = 0
BM8:
j = j+1
m = pow(j,2)
blog = LOG(j)
csin = SIN(j)
If j < 1000 then GoTo BM8
printTime(Timer-A)

End

fourthou:
RETURN



The label "main:" wasn't mentioned in the documentation and if you don't have it, the compiler gets all upset.  
 
zeitfest
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Joined: 31/07/2019
Location: Australia
Posts: 680
Posted: 02:54am 24 May 2026
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AFAIK the pico does not use a dedicated arithmetic unit like other processors,
but instead uses optimised software routines. So the interpreter and compiled version
probably execute the same underlying stuff, as opposed to a compiler's code accessing a arithmetic/logic unit. The times are slow compared to a more usual processor.
Even crappy laptops are pushing teraflops now.
 
Mixtel90

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Joined: 05/10/2019
Location: United Kingdom
Posts: 8877
Posted: 07:02am 24 May 2026
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It sort of has...
From the Datasheet:
  Quote  Each Cortex-M33 CPU core is equipped with two instances of a double-precision coprocessor that provides acceleration
of double-precision floating point operations including add, subtract, multiply, divide and square root. The design is
implemented in just a few thousand gates and so occupies much less silicon die area than a full double-precision
floating-point unit. Nevertheless, these coprocessors considerably speed up basic double-precision operations
compared to pure software implementations. The coprocessors also offer support for some single-precision operations
and conversions.

The two coprocessor instances are assigned to the Secure and Non-secure domains. Coprocessor number 4 always
maps to the coprocessor used for the current processor security state. Coprocessor number 5 always maps to the Non-
secure coprocessor instance, but is accessible only from Secure code. This duplication avoids saving and restoring the
coprocessor context during Secure/Non-secure state transitions.


Note that there is no speed gain from using integers in BASIC or from a compiler optimising code as integers or single precision. However, where some hardware coprocessors fall back into software mode for double precision the M3 doesn't. These coprocessors are *very* fast  as they are not complex structures.

  Quote  Unlike a conventional FPU, the accelerator does not contain a full register bank. Not only does this save die area, it also
means that saving and restoring the coprocessor’s state is very fast: in fact, the entire state fits within six 32-bit words
and hence can be saved to, or restored from, the CPU in three instructions.
The accelerator contains a wide adder, capable of adding two mantissa values and three exponent values
simultaneously. There is also a shifter that can either perform a logical right shift by a given amount, or normalise a
denormalised mantissa and report the amount of shift required to do so. A considerable amount of hardware in the
shifter is shared between these two operating modes.


It's pretty impressive really. Section 3.6.2 of the RP2350 Datasheet.
Mick

Zilog Inside! nascom.info for Nascom & Gemini
Preliminary MMBasic docs & my PCB designs
 
PhenixRising
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Joined: 07/11/2023
Location: United Kingdom
Posts: 1937
Posted: 10:16am 24 May 2026
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  zeitfest said  
Even crappy laptops are pushing teraflops now.


But they don't run @150Mhz  
 
PhenixRising
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Joined: 07/11/2023
Location: United Kingdom
Posts: 1937
Posted: 10:18am 24 May 2026
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  Mixtel90 said  
It's pretty impressive really. Section 3.6.2 of the RP2350 Datasheet.


No kidding. I remember thinking that I could speed something up by going all integer but the difference was negligible.  
 
zeitfest
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Location: Australia
Posts: 680
Posted: 10:29am 24 May 2026
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They seem to be describing something that is a few thousand gates used as an accelerator for software doing math, as a math coprocessor.
Usually a math coprocessor is something that does math ops in a few instruction cycles and is much faster.
(ed) I gather the pico 2 does do some math ops in a few cycles but the speeds above are still slow.
Edited 2026-05-24 21:00 by zeitfest
 
PhenixRising
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Joined: 07/11/2023
Location: United Kingdom
Posts: 1937
Posted: 11:07am 24 May 2026
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  zeitfest said   but the speeds above are still slow.


The benchmarks on our table are per iteration (time taken/1000)

The benchmarks above are for the FULL 1000 iterations (stated at the top).
 
Mixtel90

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Joined: 05/10/2019
Location: United Kingdom
Posts: 8877
Posted: 03:13pm 24 May 2026
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I think they referred to it as a "coprocessor" as that's what it sort of does. They also refer to it as an "accelerator", which is probably a more accurate description.

Oh, the evils that are benchmarks!
a) make sure that the compiler for your chosen hardware is optimised to the hilt for it.
b) use a general purpose compiler for your competition's hardware, preferably a non-optimising one that generates lots of labels.
c) bask in the glory that comes from one-upmanship!

If you hand the accelerator a single command it will probably be faster than any true "math coprocessor" at the same CPU clock speed. Anything more complex and it will get increasingly slower, but by how much may not always be relevant.
Mick

Zilog Inside! nascom.info for Nascom & Gemini
Preliminary MMBasic docs & my PCB designs
 
zeitfest
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Joined: 31/07/2019
Location: Australia
Posts: 680
Posted: 07:47am 26 May 2026
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I had a squiz at the datasheet  

Apparently the ARM processor uses a FPU for single-precision. Double precision math uses the accelerator which splits it into chunks and feeds the chunks back to the main processor to be digested using the single precision FPU.
Clever enough I guess but kind of mediocre IMHO.
 
Mixtel90

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Location: United Kingdom
Posts: 8877
Posted: 09:48am 26 May 2026
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A fraction of the complexity, size and cost of a a full double precision FPU though. The ARM Cortex series cores are optimised for low cost and high efficiency, not highest performance. There have to be trade-offs. A big FPU sits there doing nothing for most of the time in many cases.
Mick

Zilog Inside! nascom.info for Nascom & Gemini
Preliminary MMBasic docs & my PCB designs
 
PhenixRising
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Joined: 07/11/2023
Location: United Kingdom
Posts: 1937
Posted: 09:50am 26 May 2026
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ARMbasic:
Had a bit of a play with it but there is no support for the UARTs which means it's a non-starter for me  
 
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